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Subel. B
6 questions
Subelement B

MF-HF-DSC-SITOR (NBDP) Equip. & Ops:

Section 16

Transmitter Tech:

How is a J3E signal generated?

  • By using high-level modulation to produce a single sideband.
  • Correct Answer
    By using a double balanced mixer and a sideband filter.
  • By using the audio signal to phase modulate the carrier.
  • By using low level modulation and a sideband filter.
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What would be the most likely power level to use for initial MF-HF communications?

  • 25 watts PEP
  • 50 watts PEP
  • Correct Answer
    150 watts PEP
  • 600 watts PEP
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How is the lower sideband eliminated?

  • By using a double balanced mixer to block the lower sideband.
  • By using a filter to pass the lower sideband and block the upper sideband.
  • By using a double balanced mixer to insert the carrier.
  • Correct Answer
    By using a filter to pass the upper sideband and block the lower sideband.
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What is the most common method of generating a SITOR (NBDP) signal on shipboard GMDSS equipment?

  • Correct Answer
    Two alternating sidebands of 1615 Hz and 1785 Hz are offset from the carrier frequency by 1700 Hz.
  • The carrier frequency is alternately shifted from + 85 Hz to - 85 Hz while suppressing the sidebands.
  • There is one 1500 Hz sideband which is shifted from +170 Hz to - 170 Hz with a suppressed carrier.
  • Two alternating sidebands of 1500 Hz and 2300 Hz are offset from the carrier frequency by 1900 Hz.
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What are the major components of a phase locked loop frequency synthesizer?

  • Ratio detector, master oscillator, limiting amplifier and voltage controlled oscillator.
  • Phase comparator, loop filter, master oscillator and first mixer stage.
  • High pass filter, master oscillator, double balanced mixer and voltage controlled oscillator.
  • Correct Answer
    Master oscillator, frequency dividers, phase comparator, loop filter and voltage controlled oscillator.
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What is the purpose of a phase comparator in a frequency synthesizer?

  • Correct Answer
    Compare the divided outputs of the master oscillator and the voltage controlled oscillator.
  • Compare the direct outputs of the master oscillator and the voltage controlled oscillator.
  • Compare the direct output of the master oscillator and the divided output of the voltage controlled oscillator.
  • Compare the divided output of the master oscillator and the direct output of the voltage controlled oscillator.
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